Integrated circuit complexity has been increasing in accordance with Moore's law for several decades, approximately doubling the number of digital gates in a device every two years or less. This exponential rise in gate counts has resulted in rapidly escalating test complexity and cost. For instance, development of the 14 nm semiconductor manufacturing technology and other semiconductor technologies having even smaller critical dimensions requires electrical testing of a large amount of elements of circuitry such as digital logic structures, wiring at various levels, and the like electrical functioning of the elements is tested separately for each element and in conjunction with each other. Separate testing of the elements including relatively small amount of transistors and interconnects enables acquisition of electrical test data during early stage of the semiconductor manufacturing technology development when a defect density is high and as a consequence of this chances of having a defect free element including big amount of transistors and/or interconnects are low. In order to increase a volume of acquired electrical test data an auxiliary multiplexor circuitry is introduced in order to route test electrical signals between various elements and external test systems.